Senior FC Verification & Simulation Infrastructure Engineer
At a glance
Senior Platform & Infrastructure role at NVIDIA. Israel, Yokneam · full-time.
Pay not stated Infrastructure Engineer salary
devopsroles summary, based on the employer's posting.
What you'll do
- Find slow points in verification flows, then build frameworks and improve regressions to increase simulation throughput
- Write across SystemVerilog/UVM, Specman, Python, C/C++ and scripting, from RTL testbenches to automation utilities
- Debug issues spanning chip blocks and check that features work correctly and meet requirements
- Use AI coding tools and frameworks to speed up verification and infrastructure work
- Coordinate with architecture, micro-architecture, firmware and other NIC teams
What you bring
- At least eight years in silicon verification, hardware simulation or infrastructure development
- A bachelor's degree in electrical or computer engineering with strong grades, or equivalent experience
- A track record of improving verification systems through regression frameworks, faster simulation, tooling or automation
Who this fits
This senior role suits an engineer who combines chip-level verification with a hands-on infrastructure focus and strong debugging skills. You’ll work across several languages and collaborate with architecture, micro-architecture, firmware and NIC teams.
From the employer
We are looking for a best-in-class Senior Full-Chip Verification Engineer with a strong infrastructure mindset to join NVIDIA's Networking Silicon team. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level, while also driving the evolution of the simulation infrastructure powering our verification flows. You will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the world's most advanced data centers, in a meaningful, growing environment where you make a huge impact in a technology-focused company.
What you'll be doing:
Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling
Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.
System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.
Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC
What we need to see:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience
8+ years of experience in verification, HW simulation, or infrastructure development for silicon projects
Infrastructure mindset - a proven ability to enhance and scale the systems that drive verification: regression frameworks, simulation performance, tooling, and flow automation
Creativity and proactivity - an innovation mindset with a proactive approach to adopting new methodologies and coding tools to solve complex challenges
Strong debugging, problem-solving, and analytical skills
A team player with good communication and interpersonal skills
Ways to stand out:
Experience leveraging AI tools for verification automation or infrastructure acceleration.
Experience working in multi-language environments
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